国家科技成果转化引导基金设立8支创投子基金Springer Science & Business Media, 2025-08-08 - 461页 Circuit simulation is essential in integrated circuit design, and the accuracy of circuit simulation depends on the accuracy of the transistor model. BSIM3v3 (BSIM for Berkeley Short-channel IGFET Model) has been selected as the first MOSFET model for standardization by the Compact Model Council, a consortium of leading companies in semiconductor and design tools. In the next few years, many fabless and integrated semiconductor companies are expected to switch from dozens of other MOSFET models to BSIM3. This will require many device engineers and most circuit designers to learn the basics of BSIM3. MOSFET Modeling & BSIM3 User's Guide explains the detailed physical effects that are important in modeling MOSFETs, and presents the derivations of compact model expressions so that users can understand the physical meaning of the model equations and parameters. It is the first book devoted to BSIM3. It treats the BSIM3 model in detail as used in digital, analog and RF circuit design. It covers the complete set of models, i.e., I-V model, capacitance model, noise model, parasitics model, substrate current model, temperature effect model and non quasi-static model. MOSFET Modeling & BSIM3 User's Guide not only addresses the device modeling issues but also provides a user's guide to the device or circuit design engineers who use the BSIM3 model in digital/analog circuit design, RF modeling, statistical modeling, and technology prediction. This book is written for circuit designers and device engineers, as well as device scientists worldwide. It is also suitable as a reference for graduate courses and courses in circuit design or device modelling. Furthermore, it can be used as a textbook for industry courses devoted to BSIM3. MOSFET Modeling & BSIM3 User's Guide is comprehensive and practical. It is balanced between the background information and advanced discussion of BSIM3. It is helpful to experts and students alike. |
目录
1 | |
13 | |
39 | |
57 | |
65 | |
Capacitance Model | 143 |
Substrate Current Model 211 | 210 |
Noise Model | 219 |
Nonquasi Static NQS | 281 |
BSIM3v3 Model Implementation | 303 |
Model 105 | 327 |
Model Parameter Extraction | 353 |
Parameters for models of parasitic components | 418 |
B 5 | 424 |
Noise model equations | 440 |
A note on the polygate depletion | 448 |
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常见术语和短语
analog circuit bias dependence body bias BSIM3 version BSIM3v3 model calculated capacitance model capMod=0 carrier channel charge channel length channel width characteristics charge partition Cheng circuit design circuit simulation CJSW coefficient Compact Model Computer-aided Design depletion region DIBL diode model discussed doping concentration drain current drain voltage electric field Electron Devices flicker noise flicker noise model gate bias gate oxide gate voltage given in Eq I-V model IEDM Tech IEEE IEEE Trans IGFET impact ionization Integrated Circuits inversion charge inversion layer junction capacitance model implementation model parameters MOS transistor MOSFET model n-channel narrow width effect noise power density NQS model overlap capacitance oxide thickness polysilicon resistance saturation region short channel effects shown in Fig Solid-State Electronics source and drain SPICE strong inversion region subthreshold region temperature dependence thermal noise thermal noise model threshold voltage tion TNOM Vdsat VLSI Weff zero